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  this is information on a product in full production. august 2014 docid024004 rev 4 1/15 STL110N10F7 n-channel 100 v, 0.005 ? typ., 107 a, stripfet? h7 power mosfet in a powerflat? 5x6 package datasheet - production data figure 1. internal schematic diagram features ? among the lowest r ds(on) on the market ? excellent figure of merit (fom) ? low c rss /c iss ratio for emi immunity ? high avalanche ruggedness applications ? switching applications description this n-channel power mosfet utilizes the stripfet ? h7 technology with a trench gate structure combined with extremely low on- resistance. the device also offers ultra-low capacitances for higher switching frequency operations. 1 2 3 4 powerflat?5x6 am15540v2 5 6 7 8 12 34 top view d(5, 6, 7, 8) g(4) s(1, 2, 3) order code v ds r ds(on) max i d p tot STL110N10F7 100 v 0.006 ? (v gs = 10 v) 107 a 136 w table 1. device summary order code marking package packaging STL110N10F7 110n10f7 powerflat? 5x6 tape and reel www.st.com
contents STL110N10F7 2/15 docid024004 rev 4 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
docid024004 rev 4 3/15 STL110N10F7 electrical ratings 15 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v ds drain-source voltage 100 v v gs gate-source voltage 20 v i d (1) 1. this value is rated according to r thj-c. drain current (continuous) at t c = 25 c 107 a i d (1) drain current (continuous) at t c = 100 c 75 a i d (2) 2. this value is rated according to r thj-pcb. drain current (continuous) at t pcb = 25 c 21 a i d (2) drain current (continuous) at t pcb =100 c 14 a i dm (2)(3) 3. pulse width limited by safe operating area. drain current (pulsed) 84 a p tot (1) total dissipation at t c = 25 c 136 w p tot (2) total dissipation at t pcb = 25 c 4.8 w e as (4) 4. starting t j =25 c, i d =18 a, v dd =50 v single pulse avalanche energy 490 mj t j t stg operating junction temperature storage temperature -55 to 175 c table 3. thermal resistance symbol parameter value unit r thj-case thermal resistance junction-case 1.1 c/w r thj-pcb (1) 1. when mounted on fr-4 board of 1inch2, 2oz cu, t < 10 sec thermal resistance junction-pcb 31.3 c/w
electrical characteristics STL110N10F7 4/15 docid024004 rev 4 2 electrical characteristics (t case =25 c unless otherwise specified) table 4. on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage v gs = 0, i d = 250 a 100 v i dss zero gate voltage drain current v gs = 0, v ds = 100 v 1 a v gs = 0, v ds = 100 v, t c =125 c 10 a i gss gate body leakage current v ds = 0, v gs = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2.5 4.5 v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 10 a 0.005 0.006 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 50 v, f=1 mhz, v gs =0 -5117 - pf c oss output capacitance - 992 - pf c rss reverse transfer capacitance -39 - pf q g total gate charge v dd = 50 v, i d = 21 a v gs =10 v figure 14 -72 - nc q gs gate-source charge - 30 - nc q gd gate-drain charge - 17 - nc table 6. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd =50 v, i d = 10 a, r g =4.7 ? , v gs = 10 v figure 13 -25-ns t r rise time - 36 - ns t d(off) turn-off delay time - 52 - ns t f fall time - 21 - ns
docid024004 rev 4 5/15 STL110N10F7 electrical characteristics 15 table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd source-drain current - 21 a i sdm (1) 1. pulse width limited by safe operating area source-drain current (pulsed) - 84 a v sd (2) 2. pulsed: pulse duration=300 s, duty cycle 1.5% forward on voltage v gs =0, i sd = 21 a - 1.2 v t rr reverse recovery time i sd = 21 a, di/dt = 100 a/s, v dd =80 v, t j =150 c -77 ns q rr reverse recovery charge - 150 nc i rrm reverse recovery current - 4.3 a
electrical characteristics STL110N10F7 6/15 docid024004 rev 4 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. gate charge vs gate-source voltage figure 7. static drain-source on-resistance i d 10 1 0.1 1 v ds (v) 10 (a) operation in this area is limited by max r ds(on) 100ms 1s 0.1 tj=175c tpcb=25c single pulse 10ms am16083v1 single pulse =0.5 0.05 0.02 0.01 0.1 0.2 k t p (s) 10 -4 10 -2 10 -1 10 -3 10 -3 10 -2 10 -1 10 z th = k r thj-pcb 0 10 1 am16096v1 i d 80 40 20 0 2 v ds (v) 4 (a) 6 4v 7v v gs = 8, 9, 10v 60 5v 6v 8 100 120 140 160 0 am16084v1 i d 60 40 20 0 0 4 v gs (v) 8 (a) 2 6 10 30 50 70 v ds =2v am16085v1 v gs 6 4 2 0 0 40 q g (nc) (v) 8 60 80 10 v dd =50v i d =21a 12 20 am16086v1 r ds(on) 4.98 4.96 4.94 2 6 i d (a) (m ) 4 8 5.00 v gs =10v 10 12 5.02 5.04 5.06 14 16 18 20 am16087v1
docid024004 rev 4 7/15 STL110N10F7 electrical characteristics 15 figure 8. capacitance variations figure 9. normalized gate threshold voltage vs temperature figure 10. normalized on-resistance vs temperature figure 11. source-drain diode forward characteristics figure 12. normalized v (br)dss vs temperature c 3000 2000 1000 0 0 20 v ds (v) (pf) 10 30 ciss coss crss 40 50 60 70 80 4000 5000 6000 am16088v1 v gs(th) 0.7 0.6 0.5 0.4 -75 -25 t j (c) (norm) -50 0.8 50 0 25 75 i d =250a 100 125 150 0.9 1 1.1 1.2 am16089v1 r ds(on) 1.8 1.2 0.8 0.4 t j (c) (norm) 0.6 1 1.4 1.6 2 -75 -25 -50 50 0 25 75 100 125 150 i d =10 a v gs =10 v am16090v1 v sd 2 6 i sd (a) (v) 4 12 8 10 0.4 0.5 0.6 0.7 t j =-55c t j =175c t j =25c 0.8 0.9 14 16 18 20 am16092v1 v (br)dss -50 0 t j (c) (norm) -25 75 25 50 100 0.94 0.96 0.98 1 1.02 1.04 i d =1ma am16091v1
test circuits STL110N10F7 8/15 docid024004 rev 4 3 test circuits figure 13. switching times test circuit for resistive load figure 14. gate charge test circuit figure 15. test circuit for inductive load switching and diode recovery times figure 16. unclamped inductive load test circuit figure 17. unclamped inductive waveform figure 18. switching time waveform am01468v1 v gs p w v d r g r l d.u.t. 2200 f 3.3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =const 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fast diode d s l=100 h f 3.3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3.3 f v dd am01472v1 v (br)dss v dd v dd v d i dm i d am01473v1 v ds t on td on td off t off t f t r 90% 10% 10% 0 0 90% 90% 10% v gs
docid024004 rev 4 9/15 STL110N10F7 package mechanical data 15 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data STL110N10F7 10/15 docid024004 rev 4 figure 19. powerflat? 5x6 type s-c mechanical data b,b& 7rsylhz 6lghylhz %rwwrpylhz     3lq lghqwlilfdwlrq     3lq lghqwlilfdwlrq 
docid024004 rev 4 11/15 STL110N10F7 package mechanical data 15 figure 20. powerflat? 5x6 recommended footprint (dimensions in mm) table 8. powerflat? 5x6 type s-c mechanical data dim. mm min. typ. max. a0.80 1.00 a1 0.02 0.05 a2 0.25 b0.30 0.50 d5.20 d2 4.11 4.31 e6.15 e1.27 e1 0.65 e2 3.50 3.70 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 k1.05 1.35 l 0.715 1.015 footprint
packaging mechanical data STL110N10F7 12/15 docid024004 rev 4 5 packaging mechanical data figure 21. powerflat? 5x6 tape (a) figure 22. powerflat? 5x6 package orientation in carrier tape a. all dimensions are in millimeters. measured from centerline of sprocket hole to centerline of pocket. cumulative tolerance of 10 sprocket holes is 0.20 . measured from centerline of sprocket hole to centerline of pocket. (i) (ii) (iii) 2 2.00.1 (i) bo (5.300.1) ko (1.200.1) 0.05) ?1.5 min. ?1.550.05 p ao(6.300.1) f(5.500.1)(iii) w(12.000.3) 1.750.1 4.00.1 (ii) p 0 y y section y-y c l p1(8.000.1) do d1 e 1 (0.30 t ref.r0.50 ref 0.20 base and bulk quantity 3000 pcs 8234350_tape_rev_c pin 1 identification
docid024004 rev 4 13/15 STL110N10F7 packaging mechanical data 15 figure 23. powerflat? 5x6 reel 2.20 ?21.2 13.00 core detail 2.50 1.90 r0.60 77 128 ?a r1.10 2.50 4.00 r25.00 part no. w1 w2 18.4 (max) w3 06 ps esd logo at t e n t i o n observe precautions for handling electrostatic sensitive devices 11.9/15.4 12.4 (+2/-0) a 330 (+0/-4.0) all dimensions are in millimeters ?n 178(2.0) 8234350_reel_rev_c
revision history STL110N10F7 14/15 docid024004 rev 4 6 revision history table 9. document revision history date revision changes 03-dec-2012 1 first release. 12-dec-2013 2 ? modified: p tot value and figure 1 in cover page ? modified: i d , i dm and p tot values in table 2 ? added: e as value in table 2 ? modified: all values in table 3 ? modified: i dss , i gss and i d for r ds(on) ? updated: the entire typical values in table 5 , 6 and 7 ? updated: figure 13 , 14 , 15 and 16 ? minor text changes 25-mar-2014 3 ? updated title and features on cover page. ? added p tot value at t c = 25 c in table 2: absolute maximum ratings . ? updated section 4: package mechanical data . 20-aug-2014 4 ? modified: title, features and description ? modified: figure 2 and 3 ? updated: section 4: package mechanical data ? minor text changes
docid024004 rev 4 15/15 STL110N10F7 15 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved


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